View MB89P195A_198013.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

To Top / Lineup / Index
FUJITSU SEMICONDUCTOR DATA SHEET
DS07-12512-7E
8-bit Proprietary Microcontroller
CMOS
F2MC-8L MB89190/190A Series
MB89191/193/195/P195/PV190 MB89191A/191AH/193A/193AH/195A/P195A/PV190A
s OUTLINE
The MB89190/190A series microcontrollers contain various resources such as timers, serial interfaces, A/D converters, external interrupts, and remote-control functions, as well as an F2MC*-8L CPU core for low-voltage and high-speed operations. These single-chip microcontrollers are suitable for small devices such as remote controllers with compact packages. *: F2MC stands for FUJITSU Flexible Microcontroller.
s FEATURES
* Minimum execution time: 0.95 s at 4.2 MHz (VCC = 2.7 V) * F2MC-8L family CPU core * Two timers 8/16-bit timer/counter 20-bit timebase counter * Serial interface 8-bit synchronous serial (Selectable transfer direction allows communication with various equipment.)
(Continued)
s PACKAGE
28-pin Plastic SOP
28-pin Plastic DIP
28-pin Plastic SH-DIP
48-pin Ceramic MQFP
(FPT-28P-M17)
(DIP-28P-M05)
(DIP-28P-M03)
(MQP-48C-P01)
To Top / Lineup / Index
MB89190/190A Series
(Continued) * External interrupts Edge detection (Selectable edge): 3 channels Low-level interrupt (Wake-up function): 8 channels * A/D converter (MB89190A series only) 8-bit successive approximation type: 8 channels * Built-in remote-control transmitting frequency generator * Low-power consumption modes Stop mode (Almost no current consumption occurs because oscillation stops.) Sleep mode (The current consumption is reduced about 1/3 of that during normal operation because the CPU stops.) * Packages SOP-28, SH-DIP-28, and DIP-28
s PRODUCT LINEUP
Part number Item
MB89191 MB89191A MB89191AH
MB89193 MB89193A MB89193AH Mask ROM products
MB89195 MB89195A
MB89P195 MB89P195A One-time product
MB89PV190 MB89PV190A For development and evaluation
Classification
ROM size
4 K x 8 bits (internal mask ROM)
8 K x 8 bits (internal mask ROM)
16 K x 8 bits (internal mask ROM)
16 K x 8 bits 32 K x 8 bits (internal PROM, (external ROM) to be programmed with generalpurpose EPROM programmer)
RAM size CPU functions
128 x 8 bits The number of basic instructions: Instruction bit length: Instruction length: Data bit length: Minimum execution time: Interrupt processing time:
256 x 8 bits 136 8 bits 1 to 3 bytes 1, 8, and 16 bits 0.95 s at 4.2 MHz 8.57 s at 4.2 MHz
Ports
Output port (N channel open drain): 4 (also serves as peripherals for MB89190A series)or 6 (for MB89190 series) I/O port (CMOS): 16 (also serves as peripherals) Total: 20 or 22 2 channels of 8-bit timer counter or one 16-bit event counter (operation clock: 1.9 s, 30.4 s, and 487.6 s at 4.2 MHz, and external clock) 8 bits LSB/MSB first selectable Transfer clock (external, 1.9 s, 7.6 s, 30.4 s at 4.2 MHz) 8 bits x 8 channels A/D conversion mode (conversion time: 41.9 s at 4.2 MHz) Sense mode (conversion time: 11.9 s at 4.2 MHz) Capable of continuous activation by an internal timer. Reference voltage input
Timer counter Serial I/O
A/D converter (MB89190A series only)
2
(Continued)
To Top / Lineup / Index
MB89190/190A Series
(Continued)
Part number Item
MB89191 MB89191A MB89191AH
MB89193 MB89193A MB89193AH
MB89195 MB89195A
MB89P195 MB89P195A
MB89PV190 MB89PV190A
External interrupt 1
3 independent channels (selectable edge, interrupt vector, and interrupt source flag) Rising/falling/both edge selectable Used for wake-up from stop/sleep mode. (Edge detection is also permitted in the stop mode.) 8 channels (low-level interrupt only) The pulse width and cycle are software-programmable. Sleep mode and stop mode CMOS 2.2 V to 6.0 V 2.7 V to 6.0 V MBM27C256A20TVM
External interrupt 2 (Wake-up function) Remote-control transmitting frequency generator Standby mode Process Operating voltage* EPROM for use
* : Varies with conditions such as operating frequencies (see "s Electrical Characteristics.") It differs from the operating voltage of an A/D converter.
s PACKAGE AND CORRESPONDING PRODUCTS
MB89191 MB89191A MB89191AH MB89193 MB89193A MB89193AH MB89195 MB89195A
Package
MB89P195 MB89P195A
MB89PV190 MB89PV190A
DIP-28P-M05 DIP-28P-M03 FPT-28P-M17 MQP-48C-P01 : Available x x x
x x x *
x : Not available
* : A socket (manufacturer: Sun Hayato Co., Ltd.) for pin pitch conversion is available. 48QF-28SOP-8L: (MQP-48C-P01) for conversion to FPT-28P-M17 Inquiry: Sun Hayato Co., Ltd.: TEL (81)-3-3986-0403 FAX (81)-3-5396-9106 Note: For more information on each package, see "s Package Dimensions."
3
To Top / Lineup / Index
MB89190/190A Series
s DIFFERENCES AMONG PRODUCTS
1. Memory Size
Before evaluating using the piggyback model, verify its difference from the model that will actually be used. Take particular care on the following points: * On the MB89191/191A, addresses 0140H to 0180H cannot be used for register banks. * The stack area, etc., is set in the upper limit of the RAM.
2. Current Consumption
* In the case of MB89PV190/PV190A, added is the current consumed by the EPROM which is connected to the top socket. * When operated at low speed, the products with an OTPROM (EPROM) will consume more current than the products with a mask ROM. However, the same is current consumption in the sleep/stop mode. (For more information, see "s Electrical Characteristics.")
3. Mask Options
Functions that can be selected as options and how to designate these options vary with product. Before using options, check "s Mask Options." Take particular care on the following points: * Pull-up resistor optional cannot be set for P00 to P03, and P40 to P45 on the MB89191A/193A/195A/P195A. * The power-on reset option is fixed as "enabled" for MB89P195/P195A. * Options are fixed on the MB89PV190/PV190A.
4. MB89191AH/MB89193AH
MB89191AH/193AH are "L" level heavy output current drive type of P30 to P32 and P40 to P43 of MB89191A/ 193A.Characteristics other than "L" level output of P30 to P32 and P40 to P43 are the same as MB89191A/193A.
4
To Top / Lineup / Index
MB89190/190A Series
s PIN ASSIGNMENT
TOP VIEW
P04/INT24 P05/INT25 P06/INT26 P07/INT27 TEST RST X0 X1 VSS P37/BZ/RCO P36/INT12 P35/INT11 P34/TO/INT10 P33/EC
1 2 3 4 5 6 7 8 9 10 11 12 13 14
28 27 26 25 24 23 22 21 20 19 18 17 16 15
VCC P03/INT23/AN7 P02/INT22/AN6 P01/INT21/AN5 P00/INT20/AN4 P45/AVR P44/AVSS P43/AN3 P42/AN2 P41/AN1 P40/AN0 P30/SCK P31/SO P32/SI
FPT-28P-M17 DIP-28P-M03 DIP-28P-M05
5
To Top / Lineup / Index
MB89190/190A Series
(Top view) P35/INT11
N. C.
N. C.
N. C.
N. C. 38
N. C.
N. C.
N. C.
N. C.
N. C.
48
47
46
45
44
43
42
VSS
41
40
39
68
67
66
65
64
63
62
P34/TO/INT10 P33/EC P32/SI P31/SO P30/SCK P40/AN0 P41/AN1 P42/AN2 P43/AN3 P44/AVSS P45/AVR P00/INT20/AN4
1 2 3 4 5 6 7 8 9 10 11
61
37 36 35
N. C.
N. C. N. C. P36/INT12 P37/BZ/RCO X1 X0 RST TEST P07/INT27 P06/INT26 P05/INT25 P04/INT24
69 70 71 72 73 74 75 76 Each pin inside the dashed line is for MB89PV190/PV190A units only.
60 59 58 57 56 55 54 53
34 33 32 31 30 29 28 27 26
77
78
79
80
49
50
51
12 13 14
52
25 23 P02/INT22/AN6 24 P03/INT23/AN7
15
16
17
18
19
20
21 N. C.
P01/INT21/AN5
N. C.
N. C.
N. C.
N. C.
N. C.
N. C.
(MQP-48C-P01)
* Pin assignment on the package top (MB89PV190/PV190A only) Pin no. 49 50 51 52 53 54 55 56 Pin name VPP A12 A7 A6 A5 A4 A3 N.C. Pin no. 57 58 59 60 61 62 63 64 Pin name N.C. A2 A1 A0 O1 O2 O3 VSS Pin no. 65 66 67 68 69 70 71 72 Pin name O4 O5 O6 O7 O8 CE A10 N.C. Pin no. 73 74 75 76 77 78 79 80 Pin name OE N.C. A11 A9 A8 A13 A14 VCC
N.C.: Internally connected. Do not use. 6
N. C.
V CC
22
To Top / Lineup / Index
MB89190/190A Series
s PIN DESCRIPTION
Pin no. SOP*1, DIP*2 SH-DIP*3 7 8 5 6 MQFP*4 31 32 29 30 Pin name X0 X1 TEST RST B C Test input pin Connect directly to VSS. Reset I/O pin This pin consists of an N-ch open-drain output with a pull-up resistor and of hysteresis input. A low level is output from this pin by internal source. The internal circuit is initialized by the input of a low level. General-purpose I/O ports Also serve as external interrupt input pins. In the MB89190A series, also serve as analog input pins. External interrupt input is of hysteresis input type. General-purpose I/O ports Also serve as external interrupt input. External interrupt input is of hysteresis input type. General-purpose I/O port Also serves as clock I/O for the 8-bit serial I/O interface. The serial I/O clock input is of hysteresis input type with a built-in noise filter. General-purpose I/O port Also serves as a serial I/O data output pin. General-purpose I/O port Also serves as a serial I/O data input pin. The serial I/O data input is of hysteresis input type with a built-in noise filter. General-purpose I/O port Also serves as an external clock input pin for the 8bit timer/counter. External clock input of the 8-bit timer/counter is hysteresis input type with a built-in noise filter. General-purpose I/O port Also serves as the overflow output and external interrupt input for the 8-bit timer/counter. External interrupt input is of hysteresis input type with a built-in noise filter. Circuit type A Function Clock oscillation pins
24 to 27
12 13, 23, 24 25 to 28
P00/INT20/ AN4 to P03/ INT23/AN7 P04/INT24 to P07/INT27 P30/SCK
G
1 to 4
D
17
5
D
16 15
4 3
P31/SO P32/SI
E D
14
2
P33/EC
D
13
1
P34/TO/ INT10
D
*1: *2: *3: *4:
FPT-28P-M17 DIP-28C-M05 DIP-28P-M03 MQP-48C-P01
(Continued)
7
To Top / Lineup / Index
MB89190/190A Series
(Continued) Pin no.
SOP*1, DIP*2 SH-DIP*3 12 11 10 MQFP*4 48 34 33 Pin name P35/INT11 P35/INT12 P37/BZ/RCO E
Circuit type D
Function General-purpose I/O port Also serve as external interrupt input pins. External interrupt input is of hysteresis input type with a built-in noise filter. General-purpose I/O port Also serves as a buzzer output pin and remotecontrol output pin. N-ch open-drain output ports Also serve as analog input pins for the A/D converter. In the MB89190A series, also serves as a reference voltage input pin for the A/D converter. In the MB89190 series, serves as an N-ch opendrain output port. In the MB89190A series, also serves as a power pin for the A/D converter, and should be applied the same voltage as VSS to. In the MB89190 series, also serves as an N-ch open-drain output port. Power supply pin Power supply (GND) pin
18 to 21
6 to 9
P40/AN0 to P43/AN3 P45/AVR
F
23
11
F
22
10
P44/AVSS
F
28 9 *1: *2: *3: *4:
18 42
VCC VSS
-- --
FPT-28P-M17 DIP-28P-M05 DIP-28P-M03 MQP-48C-P01
8
To Top / Lineup / Index
MB89190/190A Series
* External EPROM pins (MB89PV190/PV190A) Pin no. 49 79 78 50 75 71 76 77 51 52 53 54 55 58 59 60 61 62 63 65 66 67 68 69 70 73 80 64 VPP A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 O1 O2 O3 O4 O5 O6 O7 O8 CE OE VCC VSS Pin name I/O O O "H" level output pin Address output pins Function
I
Data input pins
O O O O
ROM chip enable pin Outputs "H" during standby. ROM output enable pin Outputs "L" at all times. EPROM power pin Power supply (GND) pin
9
To Top / Lineup / Index
MB89190/190A Series
s I/O CIRCUIT TYPE
Type Circuit
X1 X0
Remarks
A
* Oscillation feedback registor of approximately 1 M at 5 V
Standby control signal
* When crystal and ceramic oscillators are selected optionally
X1 X0
Standby control signal
* When CR oscillation is selected optionally
B
C
R P-ch
* Output pull-up resistor (P-ch): Approx. 50 k at 5 V * Hysteresis input
N-ch
D
R P-ch
* CMOS output * CMOS input * Hysteresis input (resource input)
P-ch
N-ch
* Pull-up resistor optional
(Continued)
10
To Top / Lineup / Index
MB89190/190A Series
(Continued)
Type Circuit Remarks
E
R P-ch
* CMOS output * CMOS input
P-ch
N-ch
* Pull-up resistor optional F
R Pch
* N-ch open-drain output * Analog input
Nch Analog input
* Pull-up resistor optional (MB89190 series only) * * * * CMOS output CMOS input Hysteresis input (resource input) Analog input
G
R P-ch
P-ch
N-ch
Analog input
* Pull-up resistor optional (MB89190 series only)
11
To Top / Lineup / Index
MB89190/190A Series
s HANDLING DEVICES
1. Preventing Latch-up
Latchup may occur on CMOS ICs if voltage higher than VCC or lower than VSS is applied to input or output pins other than medium- and high-voltage pins or if higher than the voltage which shows on " 1. Absolute Maximum Ratings" in "s Electrical Characteristics" is applied between VCC to VSS. When latchup occurs, power supply current increases rapidly and might thermally damage elements. When using, take great care not to exceed the absolute maximum ratings. Also, take care to prevent the analog power supply (AVCC and AVR) and analog input from exceeding the digital power supply (VCC) when the analog system power supply is turned on and off.
2. Treatment of Unused Input Pins
Leaving unused input pins open could cause malfunctions. They should be connected to pull-up or pull-down resistor.
3. Treatment of Power Supply Pins on Microcontrollers with A/D and D/A Converters
Connect to be AVCC=DAVC=VCC and AVSS=AVR=VSS even if the A/D and D/A converters are not in use.
4. Treatment of N.C. Pin
Be sure to leave (internally connected) N.C. pins open.
5. Power Supply Voltage Fluctuations
Although operation is assured within the rated range of VCC power supply voltage, a rapid fluctuation of the voltage could cause malfunctions within the rated range. Stabilizing voltage supplied to the IC is therefore important. As stabilization guidelines, it is recommended to control power so that VCC ripple fluctuations (P-P value) will be less than 10% of the standard VCC value at the commercial frequency (50 to 60 Hz) and the transient fluctuation rate will be less than 0.1 V/ms at the time of a momentary fluctuation such as when power is switched.
6. Precautions when Using an External Clock
Even when an external clock is used, oscillation stabilization time is required for power-on reset (optional) and release from stop mode.
12
To Top / Lineup / Index
MB89190/190A Series
s PROGRAMMING TO PROM ON THE MB89P195/P195A
The MB89P195/P195A can program data in the internal PROM using a dedicated conversion adaptor and specified general-purpose EPROM programmer.
1. Memory Space
Address in normal operation mode
EPROM mode (Corresponding addresses on the EPROM programmer)
0000 H I/O 0080 H RAM 0180 H
8000 H
Not available
0000 H Vacancy (Read value FFH)
C000 H PROM 16 K FFFF H
4000 H EPROM 16 K 7FFF H
* Programming procedure (1) Load program data into the ROM programmer at addresses 4000H to 7FFFH. (Addresses 0C000H to 0FFFFH in the operation mode correspond to 4000H to 7FFFH in ROM programmer. See the illustration above.) (2) Set the data at addresses 0000H to 3FFFH of the programmer ROM in the ROM programmer, to FFH. (3) Program in the successive-address write mode of the ROM programmer. Note: Program must be started at the address 00000H. For details, contact our Sales Division.
13
To Top / Lineup / Index
MB89190/190A Series
2. Recommended Screening Conditions
High-temperature aging is recommended as the pre-assembly screening procedure for a product with a blanked OTPROM microcontroller program.
Program, verify
Aging +150C for 48 Hrs.
Data verification
Assembly
3. Programming Yield
Due to its nature, bit programming test can't be conducted as Fujitsu delivery test. For this reason, a programming yield of 100% cannot be assured at all times.
4. EPROM Programmer Socket Adapter
Recommended programmer manufacturer and programmer name Compatible socket adapter Sun Hayato Co., Ltd. Minato Electronics Inc. MODEL1890A (ver.2.2) + OU-910 (ver.4.1) Recommended Recommended UNISITE (ver.5.0 or later) Data I/O Co., Ltd. 3900 (ver.2.8 or later) 2900 (ver.3.8 or later)
Part no.
Package
MB89P195 MB89P195A MB89P195PF MB89P195APF
DIP-28 SOP-28
ROM-28DP28DP-8L ROM-28SOP28DP-8L
Recommended Recommended
Inquiry: Sun Hayato Co., Ltd.: TEL: (81)-3-3986-0403 FAX: (81)-3-5396-9106 Minato Electronics Inc.: TEL: USA (1)-916-348-6066 JAPAN (81)-45-591-5611 Data I/O Co., Ltd.:TEL: USA/ASIA (1)-206-881-6444 EUROPE (49)-8-985-8580
14
To Top / Lineup / Index
MB89190/190A Series
s PROGRAMMING TO THE EPROM WITH PIGGYBACK/EVALUATION DEVICE
1. EPROM for Use
MBM27C256A-20TVM
2. Programming Socket Adapter
To program to the EPROM using an EPROM programmer, use the socket adapter (manufacturer: Sun Hayato Co., Ltd.) below. Package LCC-32 Adapter socket part number ROM-32LC-28DP-YS
Inquiry: Sun Hayato Co., Ltd.: TEL (81)-3-3986-0403 FAX (81)-3-5396-9106
3. Memory Space
Address in normal operation mode 0000 H I/O 0080 H RAM 0180 H Not available 8000 H
Address when writing to EPROM (Corresponding addresses on the EPROM programmer)
0000 H
PROM 32 K
EPROM 32 K
FFFF H
7FFF H
4. Programming to the EPROM
(1) Set the EPROM programmer for MBM27C256A. (2) Load program data into the EPROM programmer at 0000H to 7FFFH. (3) Program to 0000H to 7FFFH with the EPROM programmer.
15
To Top / Lineup / Index
MB89190/190A Series
s BLOCK DIAGRAM
X0 X1
Oscillator (Max. 4.2 MHz)
Timebase timer
Clock control Internal bus
Reset circuit (WDT)
RST
CMOS I/O port 8-bit timer/counter 4 P04/INT24 to P07/INT27 Port 0 P34/TO /INT10
External interrupt (Wake-up) 8-bit timer/counter P33/EC
P00/INT20/AN4 to 4 P03/INT23/AN7 P30/SCK 8-bit A/D converter P45*/AVR P44*/AV SS P40/AN0 to P43/AN3 (MB89190A only) Port 4 8-bit serial Port 3 P32/SI P31/SO
P35/INT11 External interrupt P36/INT12
4
N-ch open-drain output port
Remote-control transmit frequency generator
P37/BZ/RCO
Buzzer output RAM CMOS I/O port
F2MC-8L CPU
ROM
The other pins TEST, VCC, V SS
*: In the MB89190A series, P44 and P45 serve only as AVR and AV ss pins, respectively, and cannot be used as ports. The MB89190 has no built-in A/D converter.
16
To Top / Lineup / Index
MB89190/190A Series
s CPU CORE
1. Memory Space
The microcontrollers of MB89190/190A series offer a 64 Kbytes of memory for storing all of I/O, data, and program areas. The I/O area is allocated from the lowest address. The data area is allocated immediately above the I/O area. The data area can be divided into register, stack, and direct areas according to the application. The program area is allocated from exactly the opposite end of I/O area, that is, the highest address. The tables of interrupt reset vectors, and vector call instructions are allocated from the highest address within the program area. The memory space of the MB89190/190A series is structured below: Memory Space
MB89191/191A MB89193/193A MB89195/195A MB89P195/P195A 0000 H I/O 0080 H Vacancy 00C0 H 0100 H Register 0140 H 0180 H 0180 H 0180 H RAM RAM 0100 H Register 0100 H Register RAM 0100 H Register RAM 0080 H I/O 0080 H MB89PV190/PV190A
0000 H I/O 0080 H
0000 H
0000 H I/O
Not available
Not available
Not available
Not available 8000 H
C000 H External ROM Program PROM (Mask ROM) Mask ROM Mask ROM FFFF H FFFF H FFFF H FFFF H
E000 H F000 H
17
To Top / Lineup / Index
MB89190/190A Series
2. Registers
The F2MC-8L family has two types of registers; dedicated hardware registers and general-purpose memory registers. The following dedicated registers are provided:
Program counter (PC): Accumulator (A): Temporary accumulator (T):
A 16-bit-long register for indicating the instruction storage positions A 16-bit-long temporary register for arithmetic operations, etc. When the instruction is an 8-bit data processing instruction, the lower byte is used. A 16-bit-long register which is used for arithmetic operations with the accumulator. When the instruction is an 8-bit data processing instruction, the lower byte is used. A 16-bit-long register for index modification A 16-bit-long pointer for indicating a memory address A 16-bit-long pointer for indicating a stack area A 16-bit-long register for storing a register pointer, a condition code
Index register (IX): Extra pointer (EP) : Stack pointer (SP) : Program status (PS) :
16 bits PC A T IX EP SP PS : Program counter : Accumulator
Initial value FFFDH Indeterminate
: Temporary accumulator Indeterminate : Index register : Extra pointer : Stack pointer : Program status Indeterminate Indeterminate Indeterminate I-flag = 0, IL1, 0 = 11 The other bit values are indeterminate
The PS can further be divided into higher 8 bits for use as a register bank pointer (RP) and the lower 8 bits for use as a condition code register (CCR) (see the diagram below).
Structure of the Program Status Register
15 PS
14
13 RP
12
11
10
9
8
7 H
6 I
5
4
3 N
2 Z
1 V
0 C
Vacancy Vacancy Vacancy
IL1, 0
RP
CCR
18
To Top / Lineup / Index
MB89190/190A Series
The RP indicates the address of the register bank currently in use. The relationship between the pointer contents and the actual address is based on the conversion rule illustrated below. Rule for Conversion of Actual Addresses of the General-purpose Register Area
RP Lower OP codes b1 b0
"0" "0" "0" "0" "0" "0" "0" "1" R4 R3 R2 R1 R0 b2
Generated addresses A15 A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0
The CCR consists of bits indicating the results of arithmetic operations and the contents of transfer data, and bits for control of CPU operations at the time of an interrupt. H-flag: Set to `1' when a carry or a borrow from bit 3 to bit 4 occurs as a result of an arithmetic operation. Cleared to `0' otherwise. This flag is for decimal adjustment instructions. I-flag: IL1, 0: Interrupt is enabled when this flag is set to `1'. Interrupt is disabled when the flag is cleared to `0'. Cleared to `0' at the reset. Indicates the level of the interrupt currently allowed. Processes an interrupt only if its request level is higher than the value indicated by this bit.
IL1 0 0 1 1
IL0 0 1 0 1
Interrupt level 1 2 3
High-low High
Low
N-flag: Set to `1' if the MSB becomes `1' as the result of an arithmetic operation. Cleared to `0' otherwise. Z-flag: V-flag: Set to `1' when an arithmetic operation results in 0. Cleared to `0' otherwise. Set to `1' if the complement on `2' overflows as a result of an arithmetic operation. Cleared to `0' if the overflow does not occur.
C-flag: Set to `1' when a carry or a borrow from bit 7 occurs as a result of an arithmetic operation. Cleared to `0' otherwise. Set to `1' the shift-out value in the case of a shift instruction.
19
To Top / Lineup / Index
MB89190/190A Series
The following general-purpose registers are provided: General-purpose registers: An 8-bit-long register for storing data The general-purpose registers are of 8 bits and located in register banks of the memory. One bank contains eight registers and up to a total of 16 banks can be used on the MB89190/190A (8 banks on MB89191/191A). The bank currently in use is indicated by the register bank pointer. (RP) Note: The number of register banks that can be used varies with the RAM size. Register Bank Configuraiton
This address = 0100 H + 8 x (RP) R0 R1 R2 R3 R4 R5 R6 R7 16 banks (8 banks for the MB89191/191A) Memory area
20
To Top / Lineup / Index
MB89190/190A Series
s I/O MAP
Address 00H 01H 02H 03H to 07H 08H 09H 0AH 0BH 0CH 0DH 0EH 0FH 10H to 13H 14H 15H 16H 17H 18H 19H 1AH 1BH 1CH 1DH 1EH 1FH 20H 21H 22H 23H 24H 25H to 31H 32H 33H 34H to 7BH 7CH 7DH 7EH 7FH Note: Do not use vacancies. (W) (W) (W) ILR1 ILR2 ILR3 (R/W) (R/W) EIE2 EIF2 (R/W) (R/W) (R/W) (R/W) (R/W) ADC1 ADC2 ADCD EIC1 EIC2 (R/W) (R/W) (R/W) (R/W) (R/W) (R/W) T2CR T1CR T2DR T1DR SMR SDR (R/W) (R/W) RCR1 RCR2 (R/W) (W) (R/W) (R/W) PDR3 DDR3 PDR4 BUZR (R/W) (R/W) (R/W) STBC WDTC TBTC Read/write (R/W) (W) (R/W) Register name PDR0 DDR0 ENI0 Register description Port 0 data register Port 0 data direction register Port 0 input enable register Vacancy Standby control register Watchdog control register Time-base timer control register Vacancy Port 3 data register Port 3 data direction register Port 4 data register Buzzer register Vacancy Remote-control transmit control register 1 Remote-control transmit control register 2 Vacancy Vacancy Timer 2 control register Timer 1 control register Timer 2 data register Timer 1 data register Serial mode register Serial data register Vacancy Vacancy A/D converter control register 1 A/D converter control register 2 A/D converter data register External interrupt control register 1 External interrupt control register 2 Vacancy External interrupt 2 enable register External interrupt 2 flag register Vacancy Interrupt level register 1 Interrupt level register 2 Interrupt level register 3 Vacancy
21
To Top / Lineup / Index
MB89190/190A Series
s ELECTRICAL CHARACTERISTICS
1. Absolute Maximum Rating
(AVSS = VSS = 0.0 V) Parameter Symbol VCC Power supply voltage EPROM program voltage Input voltage Output voltage AVR VPP VI VO IOL1 IOL2 Value Min. VSS - 0.3 VSS - 0.3 VSS - 0.3 VSS - 0.3 VSS - 0.3 Max. VSS + 7.0 VSS + 7.0 VSS + 13.0 VCC + 0.3 VCC + 0.3 10 20 Unit V V V V V mA mA Except P33 and P34 (Except P30 toP34 and P40 to P43 for MB89191AH/193AH) P33, P34(P30 toP34 and P40 to P43 for MB89191AH/193AH) Except P33 and P34 (Except P30 toP34 and P40 to P43 for MB89191AH/193AH) Average value (operating current x operation rate) P33 and P34(P30 toP34 and P40 to P43 for MB89191AH/193AH) Average value (operating current x operation rate) Average value (operating current x operation rate) Must not exceed VCC + 0.3 V. MB89190A series only MB89P195/P195A only Remarks
"L" level maximum output current
IOLAV1 "L" level average output current IOLAV2 "L" level total average output current "L" level total maximum output current "H" level maximum output current
4
mA
-40 -55
8
mA
IOLAV IOL IOH1 IOH2 IOHAV1
20 100 -10 -20 -2
mA mA mA mA mA
Except P33, P34, and P37 P33, P34, P37 Except P33, P34, and P37 Average value (operating current x operation rate) Except P33, P34, and P37 Average value (operating current x operation rate) Average value (operating current x operation rate)
"H" level average output current IOHAV2 "H" level total average output current "H" level total maximum output current Power consumption Operating temperature Storage temperature IOHAV IOH PD Ta Tstg -4 -10 -30 200 +85 +150 mA mA mA mW C C
WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current, temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings. 22
To Top / Lineup / Index
MB89190/190A Series
2. Recommended Operating Conditions
(VSS = 0.0 V) Parameter Symbol Value Min. 2.2* Power supply voltage VCC 2.7* 1.5 A/D converter reference input voltage Operating temperature AVR TA 0.0 -40 Max. 6.0* 6.0* 6.0 VCC +85 Unit V V V V C Remarks Normal operation assurance range* MB89191/191A/193/193A/195/195A Normal operation assurance range* MB89P195/P195A/PV190/PV190A Retains the RAM state in the stop mode
* : These values vary with the operation frequency and the assured analog operation range. See Figure 1 and " 5. A/D Converter Electrical Characteristics."
6 Operating voltage (V) Analog accuracy assured in the Vcc = 3.5 V to 6.0 V range. Operation assurance range
5
4
3
2
1
1
2
3
4
Main clock operation frequency (at an instruction cycle of 4/Fc) (MHz)
4.0
2.0
0.95 (s)
Minimum execution time (instruction cycle) (s) Note: The shaded area is assured only for the MB89191/191A/193/193A/195/195A.
Figure 1
Operating Voltage vs. Main Clock Operating Frequency
Figure 1 indicates the operating frequency of the external oscillator at an instruction cycle of 4/FC. 23
To Top / Lineup / Index
MB89190/190A Series
WARNING: Recommended operating conditions are normal operating ranges for the semiconductor device. All the device's electrical characteristics are warranted when operated within these ranges. Always use semiconductor devices within the recommended operating conditions. Operation outside these ranges may adversely affect reliability and could result in device failure. No warranty is made with respect to uses, operating conditions, or combinations not represented on the data sheet. Users considering application outside the listed conditions are advised to contact their FUJITSU representative beforehand.
3. DC Characteristics
(VCC = +5.0 V, AVSS = VSS = 0.0 V, TA = -40C to +85C) Value Condition Unit Remarks Min. Typ. Max. 0.7 VCC VCC + 0.3 VCC + 0.3 V
Parameter
Symbol VIH
Pin P00 to P07, P30 to P37, TEST RST, INT10 to INT12, EC, SCK, SI, INT20 to INT27 P00 to P03, P33 to P36, TEST RST, INT10 to INT12, EC, SCK, SI, INT 20 to INT27 P40 to P44 P00 to P07, P30 to P32, P35, P36 P33, P34 P37 P00 to P07, P40 to P45, P30 to P32, P35 to P37 P00 to P07, P35 to P37
"H" level input voltage VIHS
0.8 VCC VSS - 0.3 VSS - 0.3 VSS - 0.3 2.4 2.4 2.4
V
VIL "L" level input voltage VILS Open-drain output pin applied voltage
0.3 VCC
V
IOH = -2.0 mA IOH = -15 mA IOH = -7.0 mA

0.2 VCC VSS + 0.3
V
VD VOH1
V V V V
Except MB89191AH/ 193AH MB89191AH/ 193AH
"H" level output voltage
VOH2 VOH3
VOL1 "L" level output voltage
IOL = 1.8 mA
0.4
V
VOL2
RST P33, P34
IOL = 4.0 mA
0.4
V
Except MB89191AH/ 193AH MB89191AH/ 193AH
VOL3 P30 to P34, P40 to P43 Input leakage current(Hi-z output leakage current) ILI1 P00 to P07, P30 to P37, TEST P40 to P45
IOL = 12 mA
0.4
V
0.0 V < VI < VCC

5 1
A A
Without pull-up resistor Without pull-up resistor
Open-drain output leakage current (Off ILD1 state) 24
0.0 V < VI < VCC
(Continued)
To Top / Lineup / Index
MB89190/190A Series
(Continued)
Parameter Symbol Pin P00 to P07, P30 to P37, P40 to P45, RST (VCC = 5.0 V, AVSS = VSS = 0.0 V, TA = -40C to +85C) Value Condition Unit Remarks Min. Typ. Max. VI = 0.0 V 25 50 100 k MB89191/ 191A/193/ mA 193A/195/ 195A/PV190/ PV190A mA MB89P195/ P195A Stop mode
Pull-up resistance
RPULL
-- ICC FC = 4.2 MHz -- VCC ICCS ICCH FC = 4.2 MHz TA = +25 C FC = 4.2 MHz During A/D converter operation Except AVR, f = 1 MHz AVSS, VCC, and VSS -- -- -- -- --
5
10
Power supply voltage*
7 3 -- 6 8 10
12 7 1 13 15 --
mA Sleep mode A MB89191A/ mA 193A/195A/ PV190A mA MB89P195A pF
ICCA
Input capacitance CIN
* : For the MB89PV190/PV190A, the current consumption of a connected EPROM and ICE is not included. The mesurement condition of the power supply current are set as VCC = 5.0 V with an external clock.
25
To Top / Lineup / Index
MB89190/190A Series
4. AC Characteristics
(1) Reset Timing (VCC = +5.0 V10%, AVSS = VSS = 0.0 V, TA = -40C to +85C) Value Condition Unit Remarks Min. Max. -- 16 tXCYL -- ns
Parameter RST "L" pulse width
Symbol tZLZH
Note: tXCYL is the oscillation period (1/FC) input to the X0 pin.
t ZLZH
RST
0.2 VCC 0.2 VCC
(2) Power-on Reset (AVSS = VSS = 0.0 V, TA = -40C to +85C) Parameter Power supply rising time Power supply cut-off time Symbol tR tOFF Condition -- Value Min. -- 1 Max. 50 -- Unit ms ms Due to repeated operations Remarks
Note: Make sure that power supply rises within the oscillation stabilization time selected. If power supply voltage needs to be varied in the course of operation, a smooth voltage rise is recommended.
tR 2.0 V 0.2 V 0.2 V
t OFF
VCC
0.2 V
26
To Top / Lineup / Index
MB89190/190A Series
(3) Clock Timings (AVSS = VSS = 0.0 V, TA = -40C to +85C) Value Unit Remarks Min. Max. 1 238 20 -- 4.2 1000 -- 10 MHz ns ns ns External clock External clock
Parameter Clock frequency Clock cycle time Input clock pulse width Input clock pulse risilng/falling time
Symbol FC tXCYL PWH PWL tCR tCF
Pin X0, X1 X0, X1 X0 X0
Condition -- -- -- --
X0, X1 Timings and Conditions of Applied Voltage
t XCYL PWH t CR 0.8 VCC 0.8 VCC 0.2 VCC 0.2 VCC t CF PWL
X0
0.2 VCC
Clock Conditions
When a crystal or ceramic resonator is used When an external clock is used
X0
X1
X0
X1 Open
(4) Instruction Cycles (AVSS = VSS = 0.0 V, TA = -40C to +85C) Parameter Instruction cycle (minimum execution time) Symbol tinst Value (typical) 4/FC Unit s Remarks tinst = 0.95 s when operating at FC = 4.2 MHz
27
To Top / Lineup / Index
MB89190/190A Series
(5) Recommended Resonator Manufacturers * Sample Application of Piezoelectric Resonator (FAR Series)
X0
X1 R FAR*1
C1*2
C2*2 *1: Fujitsu Acoustic Resonator
FAR part number (built-in capacitor type)
Frequency Dumping (MHz) resistor 200
Initial deviation of FAR frequency (TA = +25C) 0.5%
Temperature characteristics of FAR frequency (TA = -20C to +60C) 0.5%
Loading capacitors*2
FAR-C4SA-04000- 01M Inquiry: FUJITSU LIMITED
4.00
Built-in
28
To Top / Lineup / Index
MB89190/190A Series
* Sample Application of Ceramic Resonator
X0
X1 R
*
C1
C2
* Mask ROM products Resonator manufacturer* Resonator CSA2.00MG040 CST2.00MG040 CSA4.00MG CST4.00MGW CSTCS4.00MG0C5 CCR4.0MC3 FCR4.0MC5 Frequency (MHz) 2.00 C1 (pF) 100 Built-in 30 Built-in Built-in Built-in Built-in C2 (pF) 100 Built-in 30 Built-in Built-in Built-in Built-in R Not required Not required Not required Not required Not required Not required Not required
Murata Mfg. Co., Ltd.
4.00
TDK. Co., Ltd. * One-time products Resonator manufacturer*
4.00
Resonator CSA3.20MGCA CST3.20MGA CSA3.20MGA040 CST3.20MGWA040 CSA3.58MGCA CST3.58MGWHA
Frequency (MHz)
C1 (pF) 30 Built-in 100 Built-in 30 Built-in
C2 (pF) 30 Built-in 100 Built-in 30 Built-in
R 1 k 1 k Not required Not required Not required Not required
3.20
Murata Mfg. Co., Ltd.
3.58
Inquiry:
Murata Mfg. Co., Ltd * Murata Electronics North America. Inc.: TEL 1-404-436-1300 * Murata Europe Mnagement GmbH: TEL 49-911-66870 * Murata Electronics Singapore (Pte.) Ltd.: TEL 65-758-4233 TDK Corporation * TDK Corporation of America Chicago Regional Office: TEL 1-708-803-6100 * TDK Electronics Europe GmbH Components Division: TEL 49-2102-9450 * TDK Singapore (PTE) Ltd.: TEL 65-273-5022 * TDK Hongkong Co., Ltd.: TEL 852-736-2238 * Korea Branch, TDK Corporation: TEL 82-2-554-6633
29
To Top / Lineup / Index
MB89190/190A Series
(6) Serial I/O Timings (VCC = 5.0 V10%, AVSS = VSS= 0.0 V, TA = -40C to +85C) Parameter Serial clock cycle time SCK SO time Valid SI SCK SCK valid SI hold time Serial clock "H" pulse width Serial clock "L" pulse width SCK SO time Valid SI SCK SCK valid SI hold time Symbol tSCYC tSLOV tIVSH tSHIX tSHSL tSLSH tSLOV tIVSH tSHIX Pin SCK SCK, SO SI, SCK SCK, SI SCK SCK, SO SI, SCK SCK, SI External clock operation Internal clock operation Condition Value Min. 2 tinst* -200 1/2 tinst* 1/2 tinst* 1 tinst* 1 tinst* 0 1/2 tinst* 1/2 tinst* Max. -- 200 -- -- -- -- 200 -- -- Unit s ns s s s s ns s s Remarks
* : For information on tinst, see "(4) Instruction Cycles."
Internal Shift Clock Mode
t SCYC 2.4 V 0.8 V t SLOV 2.4 V 0.8 V t IVSH t SHIX 0.8 VCC 0.2 VCC 0.8 VCC 0.2 VCC 0.8 V
SCK
SO
SI
External Shift Clock Mode
t SLSH 0.8 VCC 0.2 VCC 0.2 VCC t SLOV 2.4 V 0.8 V t
IVSH
t SHSL 0.8 VCC
SCK
SO
t
SHIX
SI
0.8 VCC 0.2 VCC
0.8 VCC 0.2 VCC
30
To Top / Lineup / Index
MB89190/190A Series
(7) Peripheral Input Timings (VCC = 5.0 V10%, AVSS = VSS = 0.0 V, TA = -40C to +85C) Value Pin Unit Remarks Min. Max. EC, INT10 to INT12, INT20 to INT27 2 tinst* 2 tinst* -- -- s s
Parameter Peripheral input "H" pulse width 1 Peripheral input "L" pulse width 1
Symbol tILIH1 tIHIL1
* : For information on tinst, see "(4) Instruction Cycles." Peripheral Input Timing Diagram
t IHIL
t ILIH 0.8 VCC 0.8 VCC
EC INT10 to INT12 INT20 to INT27
0.2 VCC 0.2 VCC
(VCC = 5.0 V10%, AVSS= VSS = 0.0 V, TA = -40C to +85C) Parameter Peripheral input "H" noise limit width Peripheral input "L" noise limit width Symbol tIHNC tILNC Pin EC, SI, SCK INT10 to INT12 EC, SI, SCK INT10 to INT12 Value Min. 7 7 Typ. 15 15 Max. 23 23 Unit ns ns Remarks
Peripheral Input Timing Diagram
t ILNC
t IHNC 0.8 VCC 0.8 VCC
EC, SCK, S1 INT10 to INT12
0.2 VCC 0.2 VCC
31
To Top / Lineup / Index
MB89190/190A Series
5. A/D Converter Electrical Characteristics (MB89190A Series Only)
(AVCC = VCC = 3.5 V to 6.0 V, AVSS = VSS = 0.0 V, TA = -40C to +85C) Parameter Resolution Total error Linearity error Differential linearity error Zero transition voltage Full-scale transition voltage Inter channel disparity A/D mode conversion time Sense mode conversion time Analog port input current Analog input voltage Reference voltage IR Reference voltage supply current AVR IRH -- IAIN -- AVR = VCC = 5.0 V when A/ D conversion is operating AN0 to AN7 -- 0 0 -- -- -- -- -- 100 -- 10 AVR VCC 300 1 A V V A A -- VOT -- VFST -- Symbol Pin Condition -- Value Min. -- -- -- -- AVSS -1.0 LSB AVR -3.0 LSB -- -- -- Typ. -- -- -- -- AVSS +0.5 LSB AVR -1.5 LSB -- 44 tinst* 12 tinst* Max. 8 1.5 1.0 0.9 AVSS +2.0 LSB AVR Unit bit LSB LSB LSB Remarks
AVR = AVCC
mV
mV
0.5 -- --
LSB s s
* : For information on tinst, see "(4) Instruction Cycles" in "4. AC Characteristics."
6. A/D Converter Glossary
* Resolution Analog changes that are identifiable by the A/D converter. When the number of bits is 8, analog voltage can be divided into 28=256. Linearity error (unit: LSB) The deviation of the straight line connecting the zero transition point ("0000 0000" "0000 0001") with the full-scale transition point ("1111 1110" "1111 1111") from actual conversion characteristics. Differential linearity error (unit: LSB) The deviation of input voltage needed change the output code by 1 LSB from the theoretical value. * Total error (unit: LSB) The difference between theoretical and actual conversion values.
32
To Top / Lineup / Index
MB89190/190A Series
Digital output 1111 1111 * * * * * * * * * * * * * * * * * * * * 0000 0000 0000 1111 1110 Theoretical conversion value Actual conversion value (1LSB x N + VOT) AVR 256 = VNT - (1LSB x N + VOT) 1LSB V( N + 1 ) T - VNT -1 1LSB VNT - (1LSB x N + 1LSB) 1LSB
1LSB =
Linearity error
Linearity error
Differential linearity error = Total error =
0010 0001 0000 VOT VNT V( N + I )T VFST Analog input
7. Notes on Using A/D Converter
* Input impedance of analog input pins The A/D converter used for the MB89190A series contains a sample hold circuit as illustrated below to fetch analog input voltage into the sample hold capacitor for eight instruction cycles after starting A/D conversion. For this reason, if the output impedance of the external circuit for the analog input is high, analog input voltage might not stabilize within the analog input sampling period. Therefore, it is recommended to keep the output impedance of the external circuit low (below 10 k). Note that if the impedance cannot be kept low, it is recommended to connect an external capacitor of approx. 0.1 F for the analog input pin.
Analog input equivalent circuit Analog input pin
Sample hold circuit, . C = 33 pF . Comparator
If the analog input impedance is higher than 10 k, it is recommended to connect an external capacitor of approx. 0.1 F.
. R = 6 k . Close for 8 instruction cycles after starting A/D conversion. Analog channel selector
* Error The smaller the AVR-AVSS, the greater the error would become relatively.
33
To Top / Lineup / Index
MB89190/190A Series
s EXAMPLE CHARACTERISTICS
(1) "L" Level Output Voltage
VOL1 vs. IOL VOL (V) 0.30 TA = +25C 0.25 0.20 0.15 0.10 0.05 0.00 VCC = 2.5 V VCC = 3.0 V VCC = 2.0 V VCC = 4.0 V VCC = 5.0 V VCC = 6.0 V 0.5 0.4 0.3 0.2 0.1 0.0 VOL (V) 0.6 VOL2 vs. IOL VCC = 2.5 V VCC = 3.0 V VCC = 2.0 V TA = +25C VCC = 4.0 V VCC = 5.0 V VCC = 6.0 V
0
1
2
3
4
5 IOL (mA)
0
1
2
3
4
5
6
7
8
9
10 IOL (mA)
VOL3 vs. IOL VOL (V) 1.2 TA = +25C 1.0 0.8 VCC = 3.0 V 0.6 0.4 0.2 0.0 VCC = 4.0 V VCC = 5.0 V VCC = 6.0 V VCC = 2.0 V VCC = 2.5 V
0
2
4
6
8
10 12
14 16
18 20 IOL (mA)
34
To Top / Lineup / Index
MB89190/190A Series
(2) "H" Level Output Voltage
VOH1 vs. IOH VCC = 4.0 V VCC = 2.5 V VCC = 2.0 V VCC = 3.0 V VCC = 5.0 V VCC = 6.0 V VOH2 vs. IOH VCC - VOH (V) VCC = 3.0 V 3.0 TA = +25C VCC = 2.5 V 2.5 2.0 1.5 1.0 0.5 0 -1 -2 -3 -4 -5 IOH (mA) 0.0 0 -4 -8 - 12 - 16 - 20 IOH (mA) VCC = 2.0 V VCC = 4.0 V VCC = 5.0 V VCC = 6.0 V
VCC - VOH (V) 0.6 TA = +25C 0.5 0.4 0.3 0.2 0.1 0.0
VOH3 vs. IOH VCC - VOH (V) VCC = 2.0 V 1.2 TA = + 25C 1.0 0.8 0.6 0.4 0.2 0.0 0 -2 -4 -6 -8 - 10 IOH (mA) VCC = 4.0 V VCC = 5.0 V VCC = 6.0 V VCC = 2.5 V VCC = 3.0 V
(3) "H" Level Input Voltage/"L" Level Input Voltage (CMOS Input)
(4) "H" Level Input Voltage/"L" Level Input Voltage (Hysteresis Input)
VIN (V) 5.0 4.5 4.0 VIN vs. VCC TA = +25C
VIN (V) 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 0 1 2
VIN vs. VCC TA= +25C
3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 0 1 2 3 4 5
VIHS VILS
6
7 VCC (V)
3
4
5
6
7 VCC (V)
VIHS: Threshold when input voltage in hysteresis characteristics is set to "H" level VILS: Threshold when input voltage in hysteresis characteristics is set to "L" level
35
To Top / Lineup / Index
MB89190/190A Series
(5) Power Supply Current (External Clock)
ICC (mA) 6 TA = +25C 5 4 3 2 1 0 1 2 3 4 ICCH vs. VCC 5 6 7 VCC (V) Fc = 1.0 MHz Fc = 4.2 MHz Fc = 3.0 MHz 1.25 1.00 0.75 0.50 0.25 0.00 1 2 3 4 IR vs. AVR 5 6 7 VCC (V) ICC vs. VCC ICCS (mA) 1.50 TA = +25C ICCS vs. VCC
Fc = 4.2 MHz
Fc = 3.0 MHz
Fc = 1.0 MHz
ICCH (A) 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 1 2 3 TA = +25C
IR (A) 150 TA = +25C 125 100 75 50 25 0
4
5
6
7 VCC (V)
1
2
3
4
5
6
7 AVR (V)
(6) Pull-up Resistance
RPULL (k) 1000
RPULL vs. VCC TA = +25C
100
10
1
2
3
4
5
6 VCC (V)
36
To Top / Lineup / Index
MB89190/190A Series
s INSTRUCTIONS (136 INSTRUCTIONS)
Execution instructions can be divided into the following four groups: * * * * Transfer Arithmetic operation Branch Others
Table 1 lists symbols used for notation of instructions. Table 1 Symbol dir off ext #vct #d8 #d16 dir: b rel @ A AH AL T TH TL IX EP PC SP PS dr CCR RP Ri x (x) (( x )) Direct address (8 bits) Offset (8 bits) Extended address (16 bits) Vector table number (3 bits) Immediate data (8 bits) Immediate data (16 bits) Bit direct address (8:3 bits) Branch relative address (8 bits) Register indirect (Example: @A, @IX, @EP) Accumulator A (Whether its length is 8 or 16 bits is determined by the instruction in use.) Upper 8 bits of accumulator A (8 bits) Lower 8 bits of accumulator A (8 bits) Temporary accumulator T (Whether its length is 8 or 16 bits is determined by the instruction in use.) Upper 8 bits of temporary accumulator T (8 bits) Lower 8 bits of temporary accumulator T (8 bits) Index register IX (16 bits) Extra pointer EP (16 bits) Program counter PC (16 bits) Stack pointer SP (16 bits) Program status PS (16 bits) Accumulator A or index register IX (16 bits) Condition code register CCR (8 bits) Register bank pointer RP (5 bits) General-purpose register Ri (8 bits, i = 0 to 7) Indicates that the very x is the immediate data. (Whether its length is 8 or 16 bits is determined by the instruction in use.) Indicates that the contents of x is the target of accessing. (Whether its length is 8 or 16 bits is determined by the instruction in use.) The address indicated by the contents of x is the target of accessing. (Whether its length is 8 or 16 bits is determined by the instruction in use.) 37 Instruction Symbols Meaning
To Top / Lineup / Index
MB89190/190A Series
Columns indicate the following: Mnemonic: ~: #: Operation: TL, TH, AH: Assembler notation of an instruction The number of instructions The number of bytes Operation of an instruction A content change when each of the TL, TH, and AH instructions is executed. Symbols in the column indicate the following: * "-" indicates no change. * dH is the 8 upper bits of operation description data. * AL and AH must become the contents of AL and AH prior to the instruction executed. * 00 becomes 00. N, Z, V, C: OP code: An instruction of which the corresponding flag will change. If + is written in this column, the relevant instruction will change its corresponding flag. Code of an instruction. If an instruction is more than one code, it is written according to the following rule: Example: 48 to 4F This indicates 48, 49, ... 4F.
38
To Top / Lineup / Index
MB89190/190A Series
Table 2 Mnemonic MOV dir,A MOV @IX +off,A MOV ext,A MOV @EP ,A MOV Ri,A MOV A,#d8 MOV A,dir MOV A,@IX +off MOV A,ext MOV A,@A MOV A,@EP MOV A,Ri MOV dir,#d8 MOV @IX +off,#d8 MOV @EP ,#d8 MOV Ri,#d8 MOVW dir,A MOVW @IX +off,A MOVW ext,A MOVW @EP ,A MOVW EP ,A MOVW A,#d16 MOVW A,dir MOVW A,@IX +off MOVW A,ext MOVW A,@A MOVW A,@EP MOVW A,EP MOVW EP ,#d16 MOVW IX,A MOVW A,IX MOVW SP ,A MOVW A,SP MOV @A,T MOVW @A,T MOVW IX,#d16 MOVW A,PS MOVW PS,A MOVW SP ,#d16 SWAP SETB dir: b CLRB dir: b XCH A,T XCHW A,T XCHW A,EP XCHW A,IX XCHW A,SP MOVW A,PC ~ 3 4 4 3 3 2 3 4 4 3 3 3 4 5 4 4 4 5 5 4 2 3 4 5 5 4 4 2 3 2 2 2 2 3 4 3 2 2 3 2 4 4 2 3 3 3 3 2 # 2 2 3 1 1 2 2 2 3 1 1 1 3 3 2 2 2 2 3 1 1 3 2 2 3 1 1 1 3 1 1 1 1 1 1 3 1 1 3 1 2 2 1 1 1 1 1 1 Transfer Instructions (48 instructions) Operation (dir) (A) ( (IX) +off ) (A) (ext) (A) ( (EP) ) (A) (Ri) (A) (A) d8 (A) (dir) (A) ( (IX) +off) (A) (ext) (A) ( (A) ) (A) ( (EP) ) (A) (Ri) (dir) d8 ( (IX) +off ) d8 ( (EP) ) d8 (Ri) d8 (dir) (AH),(dir + 1) (AL) ( (IX) +off) (AH), ( (IX) +off + 1) (AL) (ext) (AH), (ext + 1) (AL) ( (EP) ) (AH),( (EP) + 1) (AL) (EP) (A) (A) d16 (AH) (dir), (AL) (dir + 1) (AH) ( (IX) +off), (AL) ( (IX) +off + 1) (AH) (ext), (AL) (ext + 1) (AH) ( (A) ), (AL) ( (A) ) + 1) (AH) ( (EP) ), (AL) ( (EP) + 1) (A) (EP) (EP) d16 (IX) (A) (A) (IX) (SP) (A) (A) (SP) ( (A) ) (T) ( (A) ) (TH),( (A) + 1) (TL) (IX) d16 (A) (PS) (PS) (A) (SP) d16 (AH) (AL) (dir): b 1 (dir): b 0 (AL) (TL) (A) (T) (A) (EP) (A) (IX) (A) (SP) (A) (PC) TL - - - - - AL AL AL AL AL AL AL - - - - - - - - - AL AL AL AL AL AL - - - - - - - - - - - - - - - AL AL - - - - TH - - - - - - - - - - - - - - - - - - - - - AH AH AH AH AH AH - - - - - - - - - - - - - - - - AH - - - - AH - - - - - - - - - - - - - - - - - - - - - dH dH dH dH dH dH dH - - dH - dH - - - dH - - AL - - - dH dH dH dH dH NZVC ---- ---- ---- ---- ---- ++-- ++-- ++-- ++-- ++-- ++-- ++-- ---- ---- ---- ---- ---- ---- ---- ---- ---- ++-- ++-- ++-- ++-- ++-- ++-- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ++++ ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- OP code 45 46 61 47 48 to 4F 04 05 06 60 92 07 08 to 0F 85 86 87 88 to 8F D5 D6 D4 D7 E3 E4 C5 C6 C4 93 C7 F3 E7 E2 F2 E1 F1 82 83 E6 70 71 E5 10 A8 to AF A0 to A7 42 43 F7 F6 F5 F0
Notes: * During byte transfer to A, T A is restricted to low bytes. * Operands in more than one operand instruction must be stored in the order in which their mnemonics are written. (Reverse arrangement of F2MC-8 family)
39
To Top / Lineup / Index
MB89190/190A Series
Table 3 Mnemonic ADDC A,Ri ADDC A,#d8 ADDC A,dir ADDC A,@IX +off ADDC A,@EP ADDCW A ADDC A SUBC A,Ri SUBC A,#d8 SUBC A,dir SUBC A,@IX +off SUBC A,@EP SUBCW A SUBC A INC Ri INCW EP INCW IX INCW A DEC Ri DECW EP DECW IX DECW A MULU A DIVU A ANDW A ORW A XORW A CMP A CMPW A RORC A ROLC A CMP A,#d8 CMP A,dir CMP A,@EP CMP A,@IX +off CMP A,Ri DAA DAS XOR A XOR A,#d8 XOR A,dir XOR A,@EP XOR A,@IX +off XOR A,Ri AND A AND A,#d8 AND A,dir ~ 3 2 3 4 3 3 2 3 2 3 4 3 3 2 4 3 3 3 4 3 3 3 19 21 3 3 3 2 3 2 2 2 3 3 4 3 2 2 2 2 3 3 4 3 2 2 3 # 1 2 2 2 1 1 1 1 2 2 2 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 2 2 1 2 1 1 1 1 2 2 1 2 1 1 2 2 Arithmetic Operation Instructions (62 instructions) Operation (A) (A) + (Ri) + C (A) (A) + d8 + C (A) (A) + (dir) + C (A) (A) + ( (IX) +off) + C (A) (A) + ( (EP) ) + C (A) (A) + (T) + C (AL) (AL) + (TL) + C (A) (A) - (Ri) - C (A) (A) - d8 - C (A) (A) - (dir) - C (A) (A) - ( (IX) +off) - C (A) (A) - ( (EP) ) - C (A) (T) - (A) - C (AL) (TL) - (AL) - C (Ri) (Ri) + 1 (EP) (EP) + 1 (IX) (IX) + 1 (A) (A) + 1 (Ri) (Ri) - 1 (EP) (EP) - 1 (IX) (IX) - 1 (A) (A) - 1 (A) (AL) x (TL) (A) (T) / (AL),MOD (T) (A) (A) (T) (A) (A) (T) (A) (A) (T) (TL) - (AL) (T) - (A) CA C A (A) - d8 (A) - (dir) (A) - ( (EP) ) (A) - ( (IX) +off) (A) - (Ri) Decimal adjust for addition Decimal adjust for subtraction (A) (AL) (TL) (A) (AL) d8 (A) (AL) (dir) (A) (AL) ( (EP) ) (A) (AL) ( (IX) +off) (A) (AL) (Ri) (A) (AL) (TL) (A) (AL) d8 (A) (AL) (dir) TL - - - - - - - - - - - - - - - - - - - - - - - dL - - - - - - - - - - - - - - - - - - - - - - - TH - - - - - - - - - - - - - - - - - - - - - - - 00 - - - - - - - - - - - - - - - - - - - - - - - AH - - - - - dH - - - - - - dH - - - - dH - - - dH dH 00 dH dH dH - - - - - - - - - - - - - - - - - - - - NZVC ++++ ++++ ++++ ++++ ++++ ++++ ++++ ++++ ++++ ++++ ++++ ++++ ++++ ++++ +++- ---- ---- ++-- +++- ---- ---- ++-- ---- ---- ++R- ++R- ++R- ++++ ++++ ++-+ ++-+ ++++ ++++ ++++ ++++ ++++ ++++ ++++ ++R- ++R- ++R- ++R- ++R- ++R- ++R- ++R- ++R- OP code 28 to 2F 24 25 26 27 23 22 38 to 3F 34 35 36 37 33 32 C8 to CF C3 C2 C0 D8 to DF D3 D2 D0 01 11 63 73 53 12 13 03 02 14 15 17 16 18 to 1F 84 94 52 54 55 57 56 58 to 5F 62 64 65
(Continued)
40
To Top / Lineup / Index
MB89190/190A Series
(Continued)
Mnemonic AND A,@EP AND A,@IX +off AND A,Ri OR A OR A,#d8 OR A,dir OR A,@EP OR A,@IX +off OR A,Ri CMP dir,#d8 CMP @EP ,#d8 CMP @IX +off,#d8 CMP Ri,#d8 INCW SP DECW SP ~ 3 4 3 2 2 3 3 4 3 5 4 5 4 3 3 # 1 2 1 1 2 2 1 2 1 3 2 3 2 1 1 Operation (A) (AL) ( (EP) ) (A) (AL) ( (IX) +off) (A) (AL) (Ri) (A) (AL) (TL) (A) (AL) d8 (A) (AL) (dir) (A) (AL) ( (EP) ) (A) (AL) ( (IX) +off) (A) (AL) (Ri) (dir) - d8 ( (EP) ) - d8 ( (IX) + off) - d8 (Ri) - d8 (SP) (SP) + 1 (SP) (SP) - 1 Table 4 Mnemonic BZ/BEQ rel BNZ/BNE rel BC/BLO rel BNC/BHS rel BN rel BP rel BLT rel BGE rel BBC dir: b,rel BBS dir: b,rel JMP @A JMP ext CALLV #vct CALL ext XCHW A,PC RET RETI ~ 3 3 3 3 3 3 3 3 5 5 2 3 6 6 3 4 6 # 2 2 2 2 2 2 2 2 3 3 1 3 1 3 1 1 1 TL - - - - - - - - - - - - - - - TH - - - - - - - - - - - - - - - AH - - - - - - - - - - - - - - - NZVC ++R- ++R- ++R- ++R- ++R- ++R- ++R- ++R- ++R- ++++ ++++ ++++ ++++ ---- ---- OP code 67 66 68 to 6F 72 74 75 77 76 78 to 7F 95 97 96 98 to 9F C1 D1
Branch Instructions (17 instructions) Operation TL - - - - - - - - - - - - - - - - - TH - - - - - - - - - - - - - - - - - AH - - - - - - - - - - - - - - dH - - NZVC ---- ---- ---- ---- ---- ---- ---- ---- -+-- -+-- ---- ---- ---- ---- ---- ---- Restore OP code FD FC F9 F8 FB FA FF FE B0 to B7 B8 to BF E0 21 E8 to EF 31 F4 20 30
If Z = 1 then PC PC + rel If Z = 0 then PC PC + rel If C = 1 then PC PC + rel If C = 0 then PC PC + rel If N = 1 then PC PC + rel If N = 0 then PC PC + rel If V N = 1 then PC PC + rel If V N = 0 then PC PC + reI If (dir: b) = 0 then PC PC + rel If (dir: b) = 1 then PC PC + rel (PC) (A) (PC) ext Vector call Subroutine call (PC) (A),(A) (PC) + 1 Return from subrountine Return form interrupt Table 5
Other Instructions (9 instructions) Operation TL - - - - - - - - - TH - - - - - - - - - AH - dH - - - - - - - NZVC ---- ---- ---- ---- ---- ---R ---S ---- ---- OP code 40 50 41 51 00 81 91 80 90
Mnemonic PUSHW A POPW A PUSHW IX POPW IX NOP CLRC SETC CLRI SETI
~ 4 4 4 4 1 1 1 1 1
# 1 1 1 1 1 1 1 1 1
41
42
3 RETI PUSHW POPW MOV MOVW CLRI A A A,ext A,PS SETC SETI CLRB BBC INCW DECW JMP MOVW dir: 0 dir: 0,rel A A @A A,PC 4 5 6 7 8 9 A B C D E F CLRB BBC INCW DECW MOVW MOVW dir: 1 dir: 1,rel SP SP SP ,A A,SP SUBC A A A, T A A A XCH XOR AND OR
H
L
0
1
2
0
NOP
SWAP
RET
1
MULU
DIVU
A
A
JMP CALL PUSHW POPW MOV MOVW CLRC addr16 addr16 IX IX ext,A PS,A
2
ROLC
CMP
ADDC
s INSTRUCTION MAP
A
A
MOV MOV CLRB BBC INCW DECW MOVW MOVW @A,T A,@A dir: 2 dir: 2,rel IX IX IX,A A,IX
3
RORC
CMPW
A XOR AND OR DAA A,#d8 A,#d8 A,#d8 DAS
A
ADDCW SUBCW XCHW XORW ANDW ORW MOVW MOVW CLRB BBC INCW DECW MOVW MOVW A A A, T A A A @A,T A,@A dir: 3 dir: 3,rel EP EP EP ,A A,EP CLRB BBC MOVW MOVW MOVW XCHW dir: 4 dir: 4,rel A,ext ext,A A,#d16 A,PC
4
MOV CMP ADDC SUBC A,#d8 A,#d8 A,#d8 A,#d8
MB89190/190A Series
5
MOV CMP ADDC SUBC MOV XOR AND OR MOV CMP CLRB BBC MOVW MOVW MOVW XCHW A,dir A,dir A,dir A,dir dir,A A,dir A,dir A,dir dir,#d8 dir,#d8 dir: 5 dir: 5,rel A,dir dir,A SP ,#d16 A,SP
6
MOV CMP ADDC SUBC MOV XOR AND OR MOV CMP CLRB BBC MOVW MOVW MOVW XCHW A,@IX +d A,@IX +d A,@IX +d A,@IX +d @IX +d,A A,@IX +d A,@IX +d A,@IX +d @IX +d,#d8 @IX +d,#d8 dir: 6 dir: 6,rel A,@IX +d @IX +d,A IX,#d16 A,IX
7
MOV CMP ADDC SUBC MOV XOR AND OR MOV CMP CLRB BBC MOVW MOVW MOVW XCHW A,@EP A,@EP A,@EP A,@EP @EP ,A A,@EP A,@EP A,@EP @EP ,#d8 @EP ,#d8 dir: 7 dir: 7,rel A,@EP @EP ,A EP ,#d16 A,EP DEC R0 DEC R1 DEC R2 DEC R3 DEC R4 DEC R5 DEC R6 DEC R7 R7 R6 R5 R4 R3 R2 R1 R0 CALLV BNC #0 rel CALLV BC #1 CALLV BP #2 CALLV BN #3
8
MOV CMP ADDC SUBC MOV XOR AND OR MOV CMP SETB BBS INC A,R0 A,R0 A,R0 A,R0 R0,A A,R0 A,R0 A,R0 R0,#d8 R0,#d8 dir: 0 dir: 0,rel
9
MOV CMP ADDC SUBC MOV XOR AND OR MOV CMP SETB BBS INC A,R1 A,R1 A,R1 A,R1 R1,A A,R1 A,R1 A,R1 R1,#d8 R1,#d8 dir: 1 dir: 1,rel
rel
A
MOV CMP ADDC SUBC MOV XOR AND OR MOV CMP SETB BBS INC A,R2 A,R2 A,R2 A,R2 R2,A A,R2 A,R2 A,R2 R2,#d8 R2,#d8 dir: 2 dir: 2,rel
rel
B
MOV CMP ADDC SUBC MOV XOR AND OR MOV CMP SETB BBS INC A,R3 A,R3 A,R3 A,R3 R3,A A,R3 A,R3 A,R3 R3,#d8 R3,#d8 dir: 3 dir: 3,rel
rel CALLV BNZ #4 rel CALLV BZ #5
C
MOV CMP ADDC SUBC MOV XOR AND OR MOV CMP SETB BBS INC A,R4 A,R4 A,R4 A,R4 R4,A A,R4 A,R4 A,R4 R4,#d8 R4,#d8 dir: 4 dir: 4,rel
D
MOV CMP ADDC SUBC MOV XOR AND OR MOV CMP SETB BBS INC A,R5 A,R5 A,R5 A,R5 R5,A A,R5 A,R5 A,R5 R5,#d8 R5,#d8 dir: 5 dir: 5,rel
rel CALLV BGE #6 rel CALLV BLT #7
E
MOV CMP ADDC SUBC MOV XOR AND OR MOV CMP SETB BBS INC A,R6 A,R6 A,R6 A,R6 R6,A A,R6 A,R6 A,R6 R6,#d8 R6,#d8 dir: 6 dir: 6,rel
F
To Top / Lineup / Index
MOV CMP ADDC SUBC MOV XOR AND OR MOV CMP SETB BBS INC A,R7 A,R7 A,R7 A,R7 R7,A A,R7 A,R7 A,R7 R7,#d8 R7,#d8 dir: 7 dir: 7,rel
rel
To Top / Lineup / Index
MB89190/190A Series
s MASK OPTION LIST
Part number No. MB89191 MB89191A MB89193 MB89193A MB89195 MB89195A MB89P195 -101*2 None None MB89P195A -201*2 None MB89PV190 MB89PV190A Fixed Not available Not available
Specifying procedure Specify when ordering masking P00 to P07 Selectable by pin Port pull-up P30 to P37 resistors P00 to P03 Selectable Not P40 to P45 by pin available Power-on reset * Power-on reset provided * No power-on reset Selection of oscillation stabilization wait time (at 4.2 MHz)*1 3
* 218/FC (approx. 62.4 ms) * 216/FC (approx. 15.6 ms) * 212/FC (approx. 0.98 ms) * 22/FC (approx. 0 ms)
Specify when ordering masking Selectable by pin
1
Selectable Not None by pin available Provided Provided
2
Selectable
Provided
Provided
Selectable
Fixed to 216/FC
Selectable
Fixed to 216/FC
Fixed to 216/FC
4
Reset pin output * Reset output provided * No reset output Oscillation type of clock 1 Crystal and ceramic oscillators 2 CR
Selectable
Provided
Selectable
Provided Provided
5
Selectable
"1" only
Selectable
"1" only
"1" only
*1: The oscillation stabilization time is generated by dividing the original clock oscillation. The time described in this item should be used as a rough guideline since the oscillation cycle is unstable immediately after oscillation starts. "FC" indicates the original oscillation frequency. *2: -101 and -201 are provided respectively for the MB89P195 and MB89P195A OTP versions as the standard products.
43
To Top / Lineup / Index
MB89190/190A Series
s ORDERING INFORMATION
Part number MB89191PF MB89193PF MB89195PF MB89P195PF-101 MB89191APF MB89191AHPF MB89193APF MB89193AHPF MB89195APF MB89P195APF-201 MB89191P-SH MB89193P-SH MB89195P-SH MB89191AP-SH MB89191AHP-SH MB89193AP-SH MB89193AHP-SH MB89195AP-SH MB89191P MB89193P MB89195P MB89P195P-101 MB89191AP MB89191AHP MB89193AP MB89193AHP MB89195AP MB89P195AP-201 MB89PV190CF MB89PV190ACF Package Remarks
28-pin Plastic SOP (FPT-28P-M17)
28-pin Plastic SH-DIP (DIP-28C-M03)
28-pin Plastic DIP (DIP-28P-M05)
48-pin Ceramic MQFP (MQP-48C-P01)
44
To Top / Lineup / Index
MB89190/190A Series
s PACKAGE DIMENSION
28-pin Plastic SOP (FPT-28P-M17)
28
17.75 -0.20 .699 -.008
+0.25 +.010
15
Details of "B" part
Details of "A" part
0.35(.014) 11.800.30 (.465.012) 8.600.20 (.339.008) INDEX "A" 0.20(.008) 0.18(.007) MAX 0.68(.027) MAX
14
0.15(.006)
0.20(.008)
0.18(.007) MAX 0.68(.027) MAX
1
1.27(.050) TYP "B"
0.450.10 (.018.004)
0.13(.005)
M
0.150.05 (.006.002)
2.80(.110)MAX (Mounting height)
0.10(.004) 16.51(.650) REF 0.800.20 (.031.008) 10.200.30 (.402.012)
0(0)MIN (STAND OFF)
C
1994 FUJITSU LIMITED F28048S-1C-1
Dimensions in mm (inches)
28-pin Plastic DIP (DIP-28P-M05)
35.73 -0.30 1.407 -.012
+0.20 +.008
INDEX-1 13.800.25 (.543.010)
INDEX-2
0.99 -0 .039
+0.50 +.020 -0
1.52 -0 .060 -0
+0.50 +.020
0.51(.020)MIN 4.96(.195)MAX 0.250.05 (.010.002)
3.00(.118)MIN
1.58(.062) MAX
2.54(.100) TYP
0.460.08 (.018.003)
15.24(.600) TYP
15MAX
C
1994 FUJITSU LIMITED D28013S-3C-2
Dimensions in mm (inches) 45
To Top / Lineup / Index
MB89190/190A Series
28-pin Plastic SH-DIP (DIP-28P-M03)
26.00 -0.30 1.024
+.008 -.012
+0.20
INDEX-1 9.100.25 (.358.010) INDEX-2
4.85(.191)MAX
0.51(.020)MIN 0.250.05 (.010.002)
3.00(.118)MIN
0.450.10 (.018.004) 1.00 -0
+0.50 +.020
.039 -0 1.7780.18 (.070.007) 1.778(.070) MAX
10.16(.400) TYP
15MAX
23.114(.910)REF
C
1994 FUJITSU LIMITED D28012S-3C-3
Dimensions in mm (inches)
48-pin Ceramic MQFP (MQP-48C-P01)
PIN No.1 INDEX
17.20(.677)TYP 15.000.25 (.591.010) 14.820.35 (.583.014) 1.50(.059)TYP 1.00(.040)TYP 8.80(.346)REF 0.800.22 (.0315.0087) PIN No.1 INDEX
1.020.13 (.040.005)
10.92 -0.0 .430 -0
+0.13 +.005
7.14(.281) 8.71(.343) TYP TYP
PAD No.1 INDEX 0.30(.012)TYP 4.50(.177)TYP 1.10 -0.25 .043 -.010
+0.45 +.018
0.400.08 (.016.003)
0.60(.024)TYP
8.50(.335)MAX
0.150.05 (.006.002)
C
1994 FUJITSU LIMITED M48001SC-4-2
Dimensions in mm (inches)
46
To Top / Lineup / Index
MB89190/190A Series
FUJITSU LIMITED
For further information please contact:
Japan FUJITSU LIMITED Corporate Global Business Support Division Electronic Devices KAWASAKI PLANT, 4-1-1, Kamikodanaka Nakahara-ku, Kawasaki-shi Kanagawa 211-8588, Japan Tel: 81(44) 754-3763 Fax: 81(44) 754-3329
All Rights Reserved. The contents of this document are subject to change without notice. Customers are advised to consult with FUJITSU sales representatives before ordering. The information and circuit diagrams in this document are presented as examples of semiconductor device applications, and are not intended to be incorporated in devices for actual use. Also, FUJITSU is unable to assume responsibility for infringement of any patent rights or other rights of third parties arising from the use of this information or circuit diagrams. FUJITSU semiconductor devices are intended for use in standard applications (computers, office automation and other office equipment, industrial, communications, and measurement equipment, personal or household devices, etc.). CAUTION: Customers considering the use of our products in special applications where failure or abnormal operation may directly affect human lives or cause physical injury or property damage, or where extremely high levels of reliability are demanded (such as aerospace systems, atomic energy controls, sea floor repeaters, vehicle operating controls, medical devices for life support, etc.) are requested to consult with FUJITSU sales representatives before such use. The company will not be responsible for damages arising from such use without prior approval. Any semiconductor devices have an inherent chance of failure. You must protect against injury, damage or loss from such failures by incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current levels and other abnormal operating conditions. If any products described in this document represent goods or technologies subject to certain restrictions on export under the Foreign Exchange and Foreign Trade Law of Japan, the prior authorization by Japanese government will be required for export of those products from Japan.
http://www.fujitsu.co.jp/
North and South America FUJITSU MICROELECTRONICS, INC. Semiconductor Division 3545 North First Street San Jose, CA 95134-1804, USA Tel: (408) 922-9000 Fax: (408) 922-9179 Customer Response Center Mon. - Fri.: 7 am - 5 pm (PST) Tel: (800) 866-8608 Fax: (408) 922-9179
http://www.fujitsumicro.com/
Europe FUJITSU MIKROELEKTRONIK GmbH Am Siebenstein 6-10 D-63303 Dreieich-Buchschlag Germany Tel: (06103) 690-0 Fax: (06103) 690-122
http://www.fujitsu-ede.com/
Asia Pacific FUJITSU MICROELECTRONICS ASIA PTE LTD #05-08, 151 Lorong Chuan New Tech Park Singapore 556741 Tel: (65) 281-0770 Fax: (65) 281-0220
http://www.fmap.com.sg/
F9901 (c) FUJITSU LIMITED Printed in Japan
48

▲Up To Search▲

Price & Availability of MB89P195A

	To Download MB89P195A Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .